This invention relates to a phase shifter, a method for phase shifting, and to a clock recovery system for a non-return to zero data signal.
SONET OC-192 communication systems employ non-return-to-zero (NRZ) pulse code modulation (PCM) to represent binary data. Such a modulation scheme generates a signal with a spectral null at the clock frequency of 9.953 GHz or, nominally, 10 GHz. Two approaches exist for the extraction of a synchronous clock from the data signal at the SONET receiver: a phase-locked loop (PLL) technique and a filter-based (FB) technique.
In a known FB system, the received 10 GHz NRZ signal is processed by a prefilter amplifier and a frequency doubler followed by a narrow bandpass filter centered at the clock frequency. The resulting signal is a clock exhibiting considerable amplitude noise due to the random occurrence of transitions in the NRZ data and the bandpass filter's finite Q-factor. Such a clock signal requires conditioning to remove the amplitude noise and provide phase adjustment over a large fraction of one bit period. The signal conditioning devices include a serially arranged digital phase shifter, an RF amplifier, an analog phase shifter and a driver amplifier. The digital phase shifter comprises p-i-n diode switches to switch one of several different length transmission lines into the RF path. The analog phase shifter comprises varactors and branch line couplers to form reflection phase shifters, a number of which are connected in cascade. The driver amplifier contains a passive p-i-n diode limiter. This structure is expensive and not suited to monolithic integration.
FB techniques currently offer superior jitter performance over PLL techniques but they do so with a large increase in cost and complexity and lower robustness. Furthermore, PLL techniques are amenable to monolithic integration whereas current FB techniques are not. Typically, due to these drawbacks, PLL techniques have been the chosen over FB techniques even though they offer a lower performance.
This invention seeks to provide a phase shifter suitable for use in an FB clock recovery system which overcomes drawbacks attendant with known FB clock recovery systems.